From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D15F8C43458 for ; Fri, 26 Jun 2026 17:55:17 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E904210F6DA; Fri, 26 Jun 2026 17:55:16 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=google.com header.i=@google.com header.b="rsKfqsh4"; dkim-atps=neutral Received: from mail-qv1-f74.google.com (mail-qv1-f74.google.com [209.85.219.74]) by gabe.freedesktop.org (Postfix) with ESMTPS id 1273210F6DA for ; Fri, 26 Jun 2026 17:55:15 +0000 (UTC) Received: by mail-qv1-f74.google.com with SMTP id 6a1803df08f44-8e05aa49693so33978556d6.3 for ; Fri, 26 Jun 2026 10:55:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20251104; t=1782496514; x=1783101314; darn=lists.freedesktop.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:from:to:cc:subject:date:message-id:reply-to; bh=mM3PnInI6kX1xpwl2VR4RCLVCiH8w3J7RjvmONcxlFw=; b=rsKfqsh4yFESoahwnymZHu4xmqpRl8aUMd888FjtwSRGsi2DVN+Q+yrTfxm1vkpoib avz32Da4EFS3YjnWLmSgsPoAPUjeBFEByMDiHVPUjlmCT6qCzI3O2BRQwWvNokn7bmfE PsTEzdWHHxsbolWDBIg8KaUisvpWd2IqKQ9V2DkEURzXNNo0mVYs/VerOP6YWpuJ4M2/ MMiFP6YVfdJrJ2MmWvQJ6A+pepG3UmNPMQXmuuJnzK4H2zFgCMG61+6EoP/MgsL8542E TzD/O1Rs2m8MD2UINUDNbWkxYAfddHiK3QL0yMt8QxxkoSe5UYmXLS5MruR5OxzlCwzS M5/w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1782496514; x=1783101314; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=mM3PnInI6kX1xpwl2VR4RCLVCiH8w3J7RjvmONcxlFw=; b=f755tIfGAyIJ0b8spThsB2yxF5zbC9gmYnXB36T1c2z6nM7iFYlUBcsw6xTRwO2BQ2 F8tuQ0P6CXhvoOUBPvwf8dcX9K79p0sYLw6oTZyd7j4sz9HqJJSPNcsJ+Cia37TNE9uS tIsByvC+NQGa2c475IMnBtlL/a7LqMC7aZI4AlcAoenOdQqtNZm0bjeUtgQB4ZaZJqlF cY/STRBtevcZfLL07dtbanyASia3BYsfEiBydqStOAGpAbdsALO9C8jjvz0hCAqYSe3x 3LweO+5JHqLfLnq6JuhMA7jk+lFrPyxNTSaMy8Lunq1PZ/jdTVoTTWp2ZvG08LMNL0oF RJew== X-Forwarded-Encrypted: i=1; AFNElJ9EwH4V1Bpso0c1sEO5WLS7qDz5kijVwiv8XQA99JzxEejJjxXAdzsYaW9EUy37KlNlwu3+jsx2Kvw=@lists.freedesktop.org X-Gm-Message-State: AOJu0Ywe50+yz6H2e2a4b7r7Zcp5sxNE8xF3zSXQJbuBzH7vk692yhPq F5z0tII/P59LgdmWLLXGQ1H+ZHw78Pv9vuX2Udy82aSLdwYdq62O4YmM0ZllETpoFji479h16Pa Y0bY2IH+lXPff0A== X-Received: from qthg1.prod.google.com ([2002:ac8:701:0:b0:517:6e82:6e87]) (user=gildekel job=prod-delivery.src-stubby-dispatcher) by 2002:ac8:5851:0:b0:517:82af:3d4f with SMTP id d75a77b69052e-51a7275af9dmr109755031cf.6.1782496513323; Fri, 26 Jun 2026 10:55:13 -0700 (PDT) Date: Fri, 26 Jun 2026 13:54:21 -0400 In-Reply-To: <20260625160020.2873859-1-gildekel@google.com> Mime-Version: 1.0 References: <20260625160020.2873859-1-gildekel@google.com> X-Mailer: git-send-email 2.55.0.rc0.799.gd6f94ed593-goog Message-ID: <20260626175510.3899476-1-gildekel@google.com> Subject: [PATCH v2 0/2] drm/i915/display: Enable HDR over DP MST From: Gil Dekel To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Cc: uma.shankar@intel.com, jani.nikula@intel.com, imre.deak@intel.com, khaled.almahallawy@intel.com, navaremanasi@google.com, Gil Dekel Content-Type: text/plain; charset="UTF-8" X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Currently, the Intel display driver does not support HDR over DP MST connections. This series enables this functionality. To achieve this: 1. We refactor colorimetry capability queries to query and cache the value on a per-connector basis (for both SST and MST downstream sinks) instead of checking the root port's DPCD register directly (which returns false for MST hubs). 2. We update the MST stream configuration to compute the required VSC and HDR metadata SDPs. 3. We set the transcoder's Video DIP registers on stream enable and during fastsets (update_pipe) to propagate HDR metadata changes without forcing a full modeset. 4. We expose the max_bpc, HDR metadata, and DP Colorspace properties on MST connectors. Changes in v2: - Fixed critical Werror CI build break (-Wunused-but-set-variable) by removing unused display variable in intel_dp_compute_vsc_sdp(). - Resolved checkpatch warnings by hoisting variable declarations and restoring missing blank lines. - Gated attaching MST HDR_OUTPUT_METADATA property on intel_dp_has_gamut_metadata_dip() for consistency with SST. - Removed redundant direct max_bpc assignment on connector struct. Gil Dekel (2): drm/i915/display: Cache DP colorimetry support per-connector drm/i915/display/mst: Enable HDR over DP MST .../drm/i915/display/intel_display_types.h | 1 + drivers/gpu/drm/i915/display/intel_dp.c | 25 ++++++++--- drivers/gpu/drm/i915/display/intel_dp.h | 8 ++++ drivers/gpu/drm/i915/display/intel_dp_mst.c | 44 +++++++++++++++++-- 4 files changed, 68 insertions(+), 10 deletions(-) -- Gil Dekel, Software Engineer, Google / ChromeOS Display and Graphics From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A0FD0C43211 for ; Fri, 26 Jun 2026 17:55:22 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 11C5210F6DB; Fri, 26 Jun 2026 17:55:22 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=google.com header.i=@google.com header.b="spMon2RT"; dkim-atps=neutral Received: from mail-qk1-f202.google.com (mail-qk1-f202.google.com [209.85.222.202]) by gabe.freedesktop.org (Postfix) with ESMTPS id EE7E410F6DB for ; Fri, 26 Jun 2026 17:55:16 +0000 (UTC) Received: by mail-qk1-f202.google.com with SMTP id af79cd13be357-92aea0d801dso123752885a.1 for ; Fri, 26 Jun 2026 10:55:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20251104; t=1782496516; x=1783101316; darn=lists.freedesktop.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:from:to:cc:subject:date:message-id:reply-to; bh=OBPKu9Cmc9J3C37pieRPjp05jyWuksA/b6kGx2OZKfQ=; b=spMon2RTipYBYUcuJ0Ot0OSwGksPiEk3opV9USVL4tiPvJB3GoH1il+0lxboVNXPZw blHrBYjNFYWzmwPdZg8YbThmIME589kBSuQib6eUeaFN47UgcvQwWt1Ba8yBMufGJFJh 1T8dd9IP1OMAgmPSQIkCwHWX90QW1Pmo3b8tZqYBeN7w77Q1tXR9+pdl0s0wCEKsYTiN 8S/d/bSReecwPksUlcTcXwx3Z+dnzI8FhgnBpMNLjp8RI6dksDvwQgR+WceZ74rWCEIa RC60VS+goxF3u2gMuNoCEo9tlG/18GDz2ftuzYK54RA+FSxWVSgGXPML/n+VgcAL//6+ lN+w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1782496516; x=1783101316; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=OBPKu9Cmc9J3C37pieRPjp05jyWuksA/b6kGx2OZKfQ=; b=Eetatu2vNodxuFCJiUnvDtzhheiAne3eDl5WOjG4VsBMsAiZQcHo9EWvGBjQlFkIRK 5kVq+FM3UopIg6pkKslXyv2WFyvxz/gF3OnCHhcfhUszC6oYsbGmyKc9QV4MxnFHNaay kMxdLM72imNnIdRyJWZUB280wlgm0GFkU60EU+pHvW9iSJApQkSTNSWWdDFNz/eNuw1C uT09vnwYDLjd+Y9I+OHHIRbHcn1G7NgZig9DOiCPMcu7wcL2VidgFau+UImEHxdsgnI0 3S5VLSVLV+2jsYWCF6h5XfeqtC7Zsz1fGybuNo2vOqK5TBrFJynakPqf9koDqEFxORPx nGHw== X-Forwarded-Encrypted: i=1; AFNElJ/tBsYr8J4KNaYvSBFPZ0D09UWQZNezA4zRmSZXi7Ubf5PIX+9G9PdMsCE/Y10RTqtZ7DJ6ozNC/Xc=@lists.freedesktop.org X-Gm-Message-State: AOJu0Yy+kO9KdW/0DsjEV1+LRwI0PsVMqgpdbZXla8pEm0MEqr28fZWh 6kwDBXvCG2MH87qAIhV/rnZNpPa0wecjygagYNNBTJAmAgcRuiBJr4WLZgYN2elGpc0qCBYPUF1 1gChunEqxJJGc5A== X-Received: from qkntl9.prod.google.com ([2002:a05:620a:3b09:b0:915:7ecd:606b]) (user=gildekel job=prod-delivery.src-stubby-dispatcher) by 2002:a05:620a:198f:b0:915:d10e:8c4f with SMTP id af79cd13be357-9293dfbcb3emr1257302685a.53.1782496514898; Fri, 26 Jun 2026 10:55:14 -0700 (PDT) Date: Fri, 26 Jun 2026 13:54:22 -0400 In-Reply-To: <20260626175510.3899476-1-gildekel@google.com> Mime-Version: 1.0 References: <20260625160020.2873859-1-gildekel@google.com> <20260626175510.3899476-1-gildekel@google.com> X-Mailer: git-send-email 2.55.0.rc0.799.gd6f94ed593-goog Message-ID: <20260626175510.3899476-2-gildekel@google.com> Subject: [PATCH v2 1/2] drm/i915/display: Cache DP colorimetry support per-connector From: Gil Dekel To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Cc: uma.shankar@intel.com, jani.nikula@intel.com, imre.deak@intel.com, khaled.almahallawy@intel.com, navaremanasi@google.com, Gil Dekel Content-Type: text/plain; charset="UTF-8" X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Query and cache colorimetry format support on a per-connector basis instead of checking the root port's DPCD capabilities directly. Introduce intel_dp_get_colorimetry_status_aux() to query colorimetry support over a given DP AUX channel. For SST, cache this during intel_dp_detect(). For MST downstream ports, cache it using the port's sideband AUX in mst_connector_detect_ctx(). This prepares the display driver to correctly identify colorimetry/VSC SDP support on downstream MST sinks, where checking the root port's capabilities incorrectly returns false. Change-Id: I48c69c04e8baeb30e8ce86a1ad4f25e727929cdb Signed-off-by: Gil Dekel --- .../gpu/drm/i915/display/intel_display_types.h | 1 + drivers/gpu/drm/i915/display/intel_dp.c | 18 ++++++++++++++---- drivers/gpu/drm/i915/display/intel_dp.h | 2 ++ drivers/gpu/drm/i915/display/intel_dp_mst.c | 13 +++++++++++-- 4 files changed, 28 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h index c048da7d6fea..428d55f9682f 100644 --- a/drivers/gpu/drm/i915/display/intel_display_types.h +++ b/drivers/gpu/drm/i915/display/intel_display_types.h @@ -564,6 +564,7 @@ struct intel_connector { u8 dsc_hblank_expansion_quirk:1; u8 dsc_throughput_quirk:1; u8 dsc_decompression_enabled:1; + u8 colorimetry_support:1; struct { struct { diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 6e3fa6662cbe..1de26c4c867f 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -3161,9 +3161,9 @@ static void intel_dp_compute_vsc_sdp(struct intel_dp *intel_dp, struct intel_crtc_state *crtc_state, const struct drm_connector_state *conn_state) { + struct intel_connector *connector = to_intel_connector(conn_state->connector); struct drm_dp_vsc_sdp *vsc; - - if ((!intel_dp->colorimetry_support || + if ((!connector->dp.colorimetry_support || !intel_dp_needs_vsc_sdp(crtc_state, conn_state)) && !crtc_state->has_psr) return; @@ -4438,16 +4438,21 @@ void intel_dp_configure_protocol_converter(struct intel_dp *intel_dp, str_enable_disable(tmp)); } -static bool intel_dp_get_colorimetry_status(struct intel_dp *intel_dp) +bool intel_dp_get_colorimetry_status_aux(struct drm_dp_aux *aux) { u8 dprx = 0; - if (drm_dp_dpcd_readb(&intel_dp->aux, DP_DPRX_FEATURE_ENUMERATION_LIST, + if (drm_dp_dpcd_readb(aux, DP_DPRX_FEATURE_ENUMERATION_LIST, &dprx) != 1) return false; return dprx & DP_VSC_SDP_EXT_FOR_COLORIMETRY_SUPPORTED; } +static bool intel_dp_get_colorimetry_status(struct intel_dp *intel_dp) +{ + return intel_dp_get_colorimetry_status_aux(&intel_dp->aux); +} + static int intel_dp_read_dsc_dpcd(struct drm_dp_aux *aux, u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]) { @@ -6374,6 +6379,11 @@ intel_dp_detect(struct drm_connector *_connector, status, intel_dp->dpcd, intel_dp->downstream_ports); + if (status == connector_status_connected) + connector->dp.colorimetry_support = intel_dp->colorimetry_support; + else + connector->dp.colorimetry_support = false; + out_vdd_off: intel_pps_vdd_off(intel_dp); diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h index 02b691df6755..26b3a0eb354e 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.h +++ b/drivers/gpu/drm/i915/display/intel_dp.h @@ -12,6 +12,7 @@ enum intel_output_format; enum pipe; enum port; struct drm_connector_state; +struct drm_dp_aux; struct drm_dp_desc; struct drm_dp_vsc_sdp; struct drm_encoder; @@ -78,6 +79,7 @@ int intel_dp_compute_config(struct intel_atomic_state *state, bool intel_dp_needs_8b10b_fec(const struct intel_crtc_state *crtc_state, bool dsc_enabled_on_crtc); void intel_dp_dsc_reset_config(struct intel_crtc_state *crtc_state); +bool intel_dp_get_colorimetry_status_aux(struct drm_dp_aux *aux); int intel_dp_dsc_compute_config(struct intel_dp *intel_dp, struct intel_crtc_state *pipe_config, struct drm_connector_state *conn_state, diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c index ecc90e8faee1..5b76d12bb00f 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c @@ -1627,6 +1627,7 @@ mst_connector_detect_ctx(struct drm_connector *_connector, struct intel_connector *connector = to_intel_connector(_connector); struct intel_display *display = to_intel_display(connector); struct intel_dp *intel_dp = connector->mst.dp; + int status; if (!intel_display_device_enabled(display)) return connector_status_disconnected; @@ -1639,8 +1640,16 @@ mst_connector_detect_ctx(struct drm_connector *_connector, intel_dp_flush_connector_commits(connector); - return drm_dp_mst_detect_port(&connector->base, ctx, &intel_dp->mst.mgr, - connector->mst.port); + status = drm_dp_mst_detect_port(&connector->base, ctx, &intel_dp->mst.mgr, + connector->mst.port); + + if (status == connector_status_connected) + connector->dp.colorimetry_support = + intel_dp_get_colorimetry_status_aux(&connector->mst.port->aux); + else + connector->dp.colorimetry_support = false; + + return status; } static const struct drm_connector_helper_funcs mst_connector_helper_funcs = { -- Gil Dekel, Software Engineer, Google / ChromeOS Display and Graphics