diff -Naurp a/arch/mips/pci/pci-bridge.c b/arch/mips/pci/pci-bridge.c
--- a/arch/mips/pci/pci-bridge.c	2018-11-29 13:23:04.020000816 -0500
+++ b/arch/mips/pci/pci-bridge.c	2018-11-29 13:23:24.140000671 -0500
@@ -62,6 +62,21 @@ bridge_probe(nasid_t nasid, int widget_i
 	unsigned long offset = NODE_OFFSET(nasid);
 	struct bridge_controller *bc;
 
+#ifdef CONFIG_SGI_IP27
+	/*
+	 * Commit 046136170a56 changed things such that setting PCI_PROBE_ONLY
+	 * will now explicitly claim PCI resources instead of skipping the
+	 * sizing of the bridges and assigning resources.  This is okay for
+	 * the IP30's PCI code, which uses normal, ioremapped addresses to
+	 * do I/O.  IP27, however, is different and uses a hardware-specific
+	 * address range of 0x92xxxxxxxxxxxxxx for all I/O access.  As such,
+	 * the generic MIPS PCI code will not probe correctly and thus make
+	 * PCI on IP27 completely unusable.  Thus, we must restore the
+	 * original logic only for IP27 until a better solution can be found.
+	 */
+	pci_set_flags(PCI_PROBE_ONLY);
+#endif
+
 	/* XXX: Temporary until the IP27 "mega update". */
 	bc = &bridges[num_bridges];
 	if (!num_bridges)
diff -Naurp a/arch/mips/pci/pci-legacy.c b/arch/mips/pci/pci-legacy.c
--- a/arch/mips/pci/pci-legacy.c	2018-11-29 13:23:04.020000816 -0500
+++ b/arch/mips/pci/pci-legacy.c	2018-11-29 13:24:15.090000302 -0500
@@ -118,6 +118,20 @@
 		need_domain_info = 1;
 	}
 
+#ifdef CONFIG_SGI_IP27
+	/*
+	 * Commit 046136170a56 changed things such that setting PCI_PROBE_ONLY
+	 * will now explicitly claim PCI resources instead of skipping the
+	 * sizing of the bridges and assigning resources.  This is okay for
+	 * the IP30's PCI code, which uses normal, ioremapped addresses to
+	 * do I/O.  IP27, however, is different and uses a hardware-specific
+	 * address range of 0x92xxxxxxxxxxxxxx for all I/O access.  As such,
+	 * the generic MIPS PCI code will not probe correctly and thus make
+	 * PCI on IP27 completely unusable.  Thus, we must restore the
+	 * original logic only for IP27 until a better solution can be found.
+	 */
+	if (!pci_has_flag(PCI_PROBE_ONLY)) {
+#else
 	/*
 	 * We insert PCI resources into the iomem_resource and
 	 * ioport_resource trees in either pci_bus_claim_resources()
@@ -126,6 +140,7 @@
 	if (pci_has_flag(PCI_PROBE_ONLY)) {
 		pci_bus_claim_resources(bus);
 	} else {
+#endif
 		pci_bus_size_bridges(bus);
 		pci_bus_assign_resources(bus);
 	}