# --- T2-COPYRIGHT-NOTE-BEGIN ---
# T2 SDE: package/*/linux/i915-non-x86.patch
# Copyright (C) 2023 - 2024 The T2 SDE Project
# 
# This Copyright note is generated by scripts/Create-CopyPatch,
# more information can be found in the files COPYING and README.
# 
# This patch file is dual-licensed. It is available under the license the
# patched project is licensed under, as long as it is an OpenSource license
# as defined at http://www.opensource.org/ (e.g. BSD, X11) or under the terms
# of the GNU General Public License version 2 as used by the T2 SDE.
# --- T2-COPYRIGHT-NOTE-END ---

--- linux-6.2/arch/riscv/include/asm/set_memory.h.vanilla	2023-04-20 12:41:21.745077800 +0200
+++ linux-6.2/arch/riscv/include/asm/set_memory.h	2023-04-20 12:42:29.805070719 +0200
@@ -7,6 +7,9 @@
 #define _ASM_RISCV_SET_MEMORY_H
 
 #ifndef __ASSEMBLY__
+
+#include <linux/mm.h>
+
 /*
  * Functions to change memory attributes.
  */
--- linux-6.2/arch/riscv/mm/cacheflush.c.vanilla	2023-04-20 14:20:04.454690645 +0200
+++ linux-6.2/arch/riscv/mm/cacheflush.c	2023-04-20 14:21:06.698688936 +0200
@@ -95,6 +95,7 @@
 		set_bit(PG_dcache_clean, &page->flags);
 	}
 }
+EXPORT_SYMBOL_GPL(flush_icache_pte);
 #endif /* CONFIG_MMU */
 
 unsigned int riscv_cbom_block_size;
--- linux-6.2/drivers/gpu/drm/i915/gem/i915_gem_domain.c.vanilla	2023-04-20 13:14:44.147869468 +0200
+++ linux-6.2/drivers/gpu/drm/i915/gem/i915_gem_domain.c	2023-04-20 13:24:43.597807101 +0200
@@ -651,7 +651,11 @@
 		return ret;
 
 	if (obj->cache_coherent & I915_BO_CACHE_COHERENT_FOR_READ ||
+#ifdef CONFIG_X86
 	    !static_cpu_has(X86_FEATURE_CLFLUSH)) {
+#else
+	    true) {
+#endif
 		ret = i915_gem_object_set_to_cpu_domain(obj, false);
 		if (ret)
 			goto err_unpin;
@@ -702,7 +706,11 @@
 		return ret;
 
 	if (obj->cache_coherent & I915_BO_CACHE_COHERENT_FOR_WRITE ||
+#ifdef CONFIG_X86
 	    !static_cpu_has(X86_FEATURE_CLFLUSH)) {
+#else
+	    true) {
+#endif
 		ret = i915_gem_object_set_to_cpu_domain(obj, true);
 		if (ret)
 			goto err_unpin;
--- linux-6.2/drivers/gpu/drm/i915/gem/i915_gem_pages.c.vanilla	2023-04-20 13:16:07.796860765 +0200
+++ linux-6.2/drivers/gpu/drm/i915/gem/i915_gem_pages.c	2023-04-20 13:17:12.721854011 +0200
@@ -434,7 +434,12 @@
 			goto err_unpin;
 		}
 
-		if (GEM_WARN_ON(type == I915_MAP_WC && !pat_enabled()))
+		if (GEM_WARN_ON(type == I915_MAP_WC
+#ifdef CONFIG_X86
+ && !pat_enabled()))
+#else
+ ))
+#endif
 			ptr = ERR_PTR(-ENODEV);
 		else if (i915_gem_object_has_struct_page(obj))
 			ptr = i915_gem_object_map_page(obj, type);
--- linux-6.2/drivers/gpu/drm/i915/gem/i915_gem_mman.c.vanilla	2023-04-20 13:17:43.165850843 +0200
+++ linux-6.2/drivers/gpu/drm/i915/gem/i915_gem_mman.c	2023-04-20 13:31:50.681762667 +0200
@@ -76,7 +76,11 @@
 	if (args->flags & ~(I915_MMAP_WC))
 		return -EINVAL;
 
+#ifdef CONFIG_X86
 	if (args->flags & I915_MMAP_WC && !pat_enabled())
+#else
+	if (args->flags & I915_MMAP_WC)
+#endif
 		return -ENODEV;
 
 	obj = i915_gem_object_lookup(file, args->handle);
@@ -773,8 +777,10 @@
 
 	if (HAS_LMEM(to_i915(dev)))
 		mmap_type = I915_MMAP_TYPE_FIXED;
+#ifdef CONFIG_X86
 	else if (pat_enabled())
 		mmap_type = I915_MMAP_TYPE_WC;
+#endif
 	else if (!i915_ggtt_has_aperture(to_gt(i915)->ggtt))
 		return -ENODEV;
 	else
@@ -829,7 +835,9 @@
 		break;
 
 	case I915_MMAP_OFFSET_WC:
+#ifdef CONFIG_X86
 		if (!pat_enabled())
+#endif
 			return -ENODEV;
 		type = I915_MMAP_TYPE_WC;
 		break;
@@ -839,7 +847,9 @@
 		break;
 
 	case I915_MMAP_OFFSET_UC:
+#ifdef CONFIG_X86
 		if (!pat_enabled())
+#endif
 			return -ENODEV;
 		type = I915_MMAP_TYPE_UC;
 		break;
--- linux-6.2/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c.vanilla	2023-04-20 13:24:55.289805885 +0200
+++ linux-6.2/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c	2023-04-20 13:26:16.742797410 +0200
@@ -260,8 +260,13 @@
 	 * the driver.
 	 */
 	if (i915_gem_object_can_bypass_llc(obj) ||
-	    (!HAS_LLC(i915) && !IS_DG1(i915)))
+	    (!HAS_LLC(i915) && !IS_DG1(i915))) {
+#ifdef CONFIG_X86
 		wbinvd_on_all_cpus();
+#else
+		BUG();
+#endif
+	}
 
 	__i915_gem_object_set_pages(obj, sgt);
 
--- linux-6.2/drivers/gpu/drm/i915/gem/i915_gem_stolen.c.vanilla	2023-04-20 14:16:18.204696857 +0200
+++ linux-6.2/drivers/gpu/drm/i915/gem/i915_gem_stolen.c	2023-04-20 14:18:54.185692574 +0200
@@ -948,8 +948,9 @@
 i915_gem_stolen_smem_setup(struct drm_i915_private *i915, u16 type,
 			   u16 instance)
 {
-	struct intel_memory_region *mem;
+	struct intel_memory_region *mem = NULL;
 
+#ifdef CONFIG_X86
 	mem = intel_memory_region_create(i915,
 					 intel_graphics_stolen_res.start,
 					 resource_size(&intel_graphics_stolen_res),
@@ -961,7 +962,9 @@
 	intel_memory_region_set_name(mem, "stolen-system");
 
 	mem->private = true;
-
+#else
+	BUG();
+#endif
 	return mem;
 }
 
--- linux-6.2/drivers/gpu/drm/i915/gt/intel_ggtt.c.vanilla	2023-04-20 12:59:41.682963362 +0200
+++ linux-6.2/drivers/gpu/drm/i915/gt/intel_ggtt.c	2023-04-20 14:15:56.416697455 +0200
@@ -1184,8 +1184,10 @@
 	drm_dbg(&i915->drm, "GGTT size = %lluM\n", ggtt->vm.total >> 20);
 	drm_dbg(&i915->drm, "GMADR size = %lluM\n",
 		(u64)ggtt->mappable_end >> 20);
+#ifdef CONFIG_X86
 	drm_dbg(&i915->drm, "DSM size = %lluM\n",
 		(u64)resource_size(&intel_graphics_stolen_res) >> 20);
+#endif
 
 	return 0;
 }
@@ -1304,8 +1306,10 @@
 
 	ggtt->invalidate(ggtt);
 
+#if CONFIG_X86
 	if (flush)
 		wbinvd_on_all_cpus();
+#endif
 
 	if (GRAPHICS_VER(ggtt->vm.i915) >= 8)
 		setup_private_pat(ggtt->vm.gt);
--- linux-6.2/drivers/gpu/drm/i915/gt/intel_llc.c.vanilla	2023-04-20 13:08:34.680907908 +0200
+++ linux-6.2/drivers/gpu/drm/i915/gt/intel_llc.c	2023-04-20 13:12:15.381884946 +0200
@@ -3,7 +3,9 @@
  * Copyright © 2019 Intel Corporation
  */
 
+#ifdef CONFIG_X86
 #include <asm/tsc.h>
+#endif
 #include <linux/cpufreq.h>
 
 #include "i915_drv.h"
@@ -37,11 +39,15 @@
 		max_khz = policy->cpuinfo.max_freq;
 		cpufreq_cpu_put(policy);
 	} else {
+#ifdef CONFIG_X86
 		/*
 		 * Default to measured freq if none found, PCU will ensure we
 		 * don't go over
 		 */
 		max_khz = tsc_khz;
+#else
+		BUG();
+#endif
 	}
 
 	return max_khz / 1000;
--- linux-6.2/drivers/gpu/drm/i915/Kconfig.vanilla	2023-04-20 12:34:31.196120514 +0200
+++ linux-6.2/drivers/gpu/drm/i915/Kconfig	2023-04-20 12:35:09.881116489 +0200
@@ -2,7 +2,7 @@
 config DRM_I915
 	tristate "Intel 8xx/9xx/G3x/G4x/HD Graphics"
 	depends on DRM
-	depends on X86 && PCI
+	depends on PCI && (X86_64 || RISCV64)
 	depends on !PREEMPT_RT
 	select INTEL_GTT if X86
 	select INTERVAL_TREE
@@ -25,7 +25,7 @@
 	# but for select to work, need to select ACPI_VIDEO's dependencies, ick
 	select BACKLIGHT_CLASS_DEVICE if ACPI
 	select INPUT if ACPI
-	select X86_PLATFORM_DEVICES if ACPI
-	select ACPI_WMI if ACPI
+	select X86_PLATFORM_DEVICES if (ACPI && X86)
+	select ACPI_WMI if (ACPI && X86)
 	select ACPI_VIDEO if ACPI
 	select ACPI_BUTTON if ACPI
--- linux-6.8/drivers/gpu/drm/i915/i915_memcpy.c.vanilla	2024-03-12 19:07:22.475876621 +0100
+++ linux-6.8/drivers/gpu/drm/i915/i915_memcpy.c	2024-03-12 19:07:29.830875913 +0100
@@ -25,7 +25,11 @@
 #include <linux/kernel.h>
 #include <linux/string.h>
 #include <linux/cpufeature.h>
+#ifdef CONFIG_X86
 #include <asm/fpu/api.h>
+#else
+#include <linux/string.h>
+#endif
 
 #include "i915_memcpy.h"
 
@@ -33,6 +37,8 @@
 #define CI_BUG_ON(expr) BUILD_BUG_ON_INVALID(expr)
 #endif
 
+#ifdef CONFIG_X86
+
 static DEFINE_STATIC_KEY_FALSE(has_movntdqa);
 
 static void __memcpy_ntdqa(void *dst, const void *src, unsigned long len)
@@ -166,3 +172,21 @@
 	    !boot_cpu_has(X86_FEATURE_HYPERVISOR))
 		static_branch_enable(&has_movntdqa);
 }
+
+#else
+
+bool i915_memcpy_from_wc(void *dst, const void *src, unsigned long len)
+{
+  return false;
+}
+
+void i915_unaligned_memcpy_from_wc(void *dst, const void *src, unsigned long len)
+{
+  memcpy(dst, src, len);
+}
+
+void i915_memcpy_init_early(struct drm_i915_private *dev_priv)
+{
+}
+
+#endif
--- linux-6.2/drivers/gpu/drm/i915/i915_gem.c.vanilla	2023-04-20 13:12:53.834880945 +0200
+++ linux-6.2/drivers/gpu/drm/i915/i915_gem.c	2023-04-20 13:14:31.471870787 +0200
@@ -679,8 +679,10 @@
 	 * overcomplicate things and flush the entire patch.
 	 */
 	partial_cacheline_write = 0;
+#ifdef CONFIG_X86
 	if (needs_clflush & CLFLUSH_BEFORE)
 		partial_cacheline_write = boot_cpu_data.x86_clflush_size - 1;
+#endif
 
 	user_data = u64_to_user_ptr(args->data_ptr);
 	remain = args->size;
--- linux-6.2/drivers/gpu/drm/i915/i915_cmd_parser.c.vanilla	2023-04-20 13:26:35.211795489 +0200
+++ linux-6.2/drivers/gpu/drm/i915/i915_cmd_parser.c	2023-04-20 13:29:45.000775743 +0200
@@ -1202,9 +1202,14 @@
 		 * validate up to the end of the batch.
 		 */
 		remain = length;
-		if (dst_needs_clflush & CLFLUSH_BEFORE)
+		if (dst_needs_clflush & CLFLUSH_BEFORE) {
+#ifdef CONFIG_X86
 			remain = round_up(remain,
 					  boot_cpu_data.x86_clflush_size);
+#else
+			BUG();
+#endif
+		}
 
 		ptr = dst;
 		x = offset_in_page(offset);
--- linux-6.2/drivers/gpu/drm/i915/intel_uncore.h.vanilla	2023-04-20 13:48:33.320742568 +0200
+++ linux-6.2/drivers/gpu/drm/i915/intel_uncore.h	2023-04-20 13:57:44.728727428 +0200
@@ -180,7 +180,11 @@
 		enum forcewake_domain_id id;
 		enum forcewake_domains mask;
 		unsigned int wake_count;
+#ifdef CONFIG_X86
 		bool active;
+#else
+		int active;
+#endif
 		struct hrtimer timer;
 		u32 __iomem *reg_set;
 		u32 __iomem *reg_ack;
--- linux-6.2/drivers/gpu/drm/i915/i915_gpu_error.c.vanilla	2023-04-20 15:53:23.815536910 +0200
+++ linux-6.2/drivers/gpu/drm/i915/i915_gpu_error.c	2023-04-20 15:53:36.324536566 +0200
@@ -2106,7 +2106,11 @@
 void i915_error_state_store(struct i915_gpu_coredump *error)
 {
 	struct drm_i915_private *i915;
+#ifdef CONFIG_X86
 	static bool warned;
+#else
+	static int warned;
+#endif
 
 	if (IS_ERR_OR_NULL(error))
 		return;
--- linux-6.2/drivers/gpu/drm/i915/gt/gen8_ppgtt.c.vanilla	2023-04-20 18:52:42.094241532 +0200
+++ linux-6.2/drivers/gpu/drm/i915/gt/gen8_ppgtt.c	2023-04-20 18:55:10.075237469 +0200
@@ -18,12 +18,17 @@
 static u64 gen8_pde_encode(const dma_addr_t addr,
 			   const enum i915_cache_level level)
 {
+#ifndef CONFIG_X86
+	u64 pde = addr;
+	printk("NYI %s\n", __FUNCTION__);
+#else
 	u64 pde = addr | GEN8_PAGE_PRESENT | GEN8_PAGE_RW;
 
 	if (level != I915_CACHE_NONE)
 		pde |= PPAT_CACHED_PDE;
 	else
 		pde |= PPAT_UNCACHED;
+#endif
 
 	return pde;
 }
@@ -32,6 +37,10 @@
 			   enum i915_cache_level level,
 			   u32 flags)
 {
+#ifndef CONFIG_X86
+	gen8_pte_t pte = addr;
+	printk("NYI %s\n", __FUNCTION__);
+#else
 	gen8_pte_t pte = addr | GEN8_PAGE_PRESENT | GEN8_PAGE_RW;
 
 	if (unlikely(flags & PTE_READ_ONLY))
@@ -51,6 +60,7 @@
 		pte |= PPAT_CACHED;
 		break;
 	}
+#endif
 
 	return pte;
 }