# --- T2-COPYRIGHT-BEGIN ---
# t2/package/*/openroad-opensta/support_latest_tcl.patch
# Copyright (C) 2025 The T2 SDE Project
# SPDX-License-Identifier: GPL-2.0 or patched project license
# --- T2-COPYRIGHT-END ---

diff --git a/tcl/StaTclTypes.i b/tcl/StaTclTypes.i
index c66e9a22..9265a487 100644
--- a/tcl/StaTclTypes.i
+++ b/tcl/StaTclTypes.i
@@ -437,7 +437,7 @@ using namespace sta;
 }
 
 %typemap(in) Transition* {
-  int length;
+  Tcl_Size length;
   const char *arg = Tcl_GetStringFromObj($input, &length);
   Transition *tr = Transition::find(arg);
   if (tr == nullptr) {
@@ -457,7 +457,7 @@ using namespace sta;
 }
 
 %typemap(in) RiseFall* {
-  int length;
+  Tcl_Size length;
   const char *arg = Tcl_GetStringFromObj($input, &length);
   const RiseFall *rf = RiseFall::find(arg);
   if (rf == nullptr) {
@@ -477,7 +477,7 @@ using namespace sta;
 }
 
 %typemap(in) RiseFallBoth* {
-  int length;
+  Tcl_Size length;
   const char *arg = Tcl_GetStringFromObj($input, &length);
   const RiseFallBoth *rf = RiseFallBoth::find(arg);
   if (rf == nullptr) {
@@ -497,7 +497,7 @@ using namespace sta;
 }
 
 %typemap(in) PortDirection* {
-  int length;
+  Tcl_Size length;
   const char *arg = Tcl_GetStringFromObj($input, &length);
   PortDirection *dir = PortDirection::find(arg);
   if (dir == nullptr) {
@@ -509,7 +509,7 @@ using namespace sta;
  }
 
 %typemap(in) TimingRole* {
-  int length;
+  Tcl_Size length;
   const char *arg = Tcl_GetStringFromObj($input, &length);
   const TimingRole *role = TimingRole::find(arg);
   if (role)
@@ -526,7 +526,7 @@ using namespace sta;
 }
 
 %typemap(in) LogicValue {
-  int length;
+  Tcl_Size length;
   const char *arg = Tcl_GetStringFromObj($input, &length);
   if (stringEq(arg, "0") || stringEq(arg, "zero"))
     $1 = LogicValue::zero;
@@ -545,7 +545,7 @@ using namespace sta;
 }
 
 %typemap(in) AnalysisType {
-  int length;
+  Tcl_Size length;
   const char *arg = Tcl_GetStringFromObj($input, &length);
   if (stringEqual(arg, "single"))
     $1 = AnalysisType::single;
@@ -849,7 +849,7 @@ using namespace sta;
 }
 
 %typemap(in) MinMax* {
-  int length;
+  Tcl_Size length;
   char *arg = Tcl_GetStringFromObj($input, &length);
   // Swig is retarded and drops const on args.
   MinMax *min_max = const_cast<MinMax*>(MinMax::find(arg));
@@ -870,7 +870,7 @@ using namespace sta;
 }
 
 %typemap(in) MinMaxAll* {
-  int length;
+  Tcl_Size length;
   char *arg = Tcl_GetStringFromObj($input, &length);
   // Swig is retarded and drops const on args.
   MinMaxAll *min_max = const_cast<MinMaxAll*>(MinMaxAll::find(arg));
@@ -883,7 +883,7 @@ using namespace sta;
 }
 
 %typemap(in) MinMaxAllNull* {
-  int length;
+  Tcl_Size length;
   char *arg = Tcl_GetStringFromObj($input, &length);
   if (stringEqual(arg, "NULL"))
     $1 = nullptr;
@@ -905,7 +905,7 @@ using namespace sta;
 
 // SetupHold is typedef'd to MinMax.
 %typemap(in) const SetupHold* {
-  int length;
+  Tcl_Size length;
   char *arg = Tcl_GetStringFromObj($input, &length);
   // Swig is retarded and drops const on args.
   if (stringEqual(arg, "hold")
@@ -922,7 +922,7 @@ using namespace sta;
 
 // SetupHoldAll is typedef'd to MinMaxAll.
 %typemap(in) const SetupHoldAll* {
-  int length;
+  Tcl_Size length;
   char *arg = Tcl_GetStringFromObj($input, &length);
   // Swig is retarded and drops const on args.
   if (stringEqual(arg, "hold")
@@ -942,7 +942,7 @@ using namespace sta;
 
 // EarlyLate is typedef'd to MinMax.
 %typemap(in) const EarlyLate* {
-  int length;
+  Tcl_Size length;
   char *arg = Tcl_GetStringFromObj($input, &length);
   // Swig is retarded and drops const on args.
   EarlyLate *early_late = const_cast<EarlyLate*>(EarlyLate::find(arg));
@@ -956,7 +956,7 @@ using namespace sta;
 
 // EarlyLateAll is typedef'd to MinMaxAll.
 %typemap(in) const EarlyLateAll* {
-  int length;
+  Tcl_Size length;
   char *arg = Tcl_GetStringFromObj($input, &length);
   // Swig is retarded and drops const on args.
   EarlyLateAll *early_late = const_cast<EarlyLateAll*>(EarlyLateAll::find(arg));
@@ -969,7 +969,7 @@ using namespace sta;
 }
 
 %typemap(in) TimingDerateType {
-  int length;
+  Tcl_Size length;
   char *arg = Tcl_GetStringFromObj($input, &length);
   if (stringEq(arg, "net_delay"))
     $1 = TimingDerateType::net_delay;
@@ -984,7 +984,7 @@ using namespace sta;
 }
 
 %typemap(in) TimingDerateCellType {
-  int length;
+  Tcl_Size length;
   char *arg = Tcl_GetStringFromObj($input, &length);
   if (stringEq(arg, "cell_delay"))
     $1 = TimingDerateCellType::cell_delay;
@@ -997,7 +997,7 @@ using namespace sta;
 }
 
 %typemap(in) PathClkOrData {
-  int length;
+  Tcl_Size length;
   char *arg = Tcl_GetStringFromObj($input, &length);
   if (stringEq(arg, "clk"))
     $1 = PathClkOrData::clk;
@@ -1010,7 +1010,7 @@ using namespace sta;
 }
 
 %typemap(in) ReportSortBy {
-  int length;
+  Tcl_Size length;
   char *arg = Tcl_GetStringFromObj($input, &length);
   if (stringEq(arg, "group"))
     $1 = sort_by_group;
@@ -1023,7 +1023,7 @@ using namespace sta;
 }
 
 %typemap(in) ReportPathFormat {
-  int length;
+  Tcl_Size length;
   char *arg = Tcl_GetStringFromObj($input, &length);
   if (stringEq(arg, "full"))
     $1 = ReportPathFormat::full;
@@ -1261,7 +1261,7 @@ using namespace sta;
 }
 
 %typemap(in) PropertyValue {
-  int length;
+  Tcl_Size length;
   const char *arg = Tcl_GetStringFromObj($input, &length);
   $1 = PropertyValue(arg);
 }
@@ -1404,7 +1404,7 @@ using namespace sta;
 }
 
 %typemap(in) CircuitSim {
-  int length;
+  Tcl_Size length;
   char *arg = Tcl_GetStringFromObj($input, &length);
   if (stringEq(arg, "hspice"))
     $1 = CircuitSim::hspice;
diff --git a/tcl/TclTypeHelpers.cc b/tcl/TclTypeHelpers.cc
index e3cabbb6..f0d7785a 100644
--- a/tcl/TclTypeHelpers.cc
+++ b/tcl/TclTypeHelpers.cc
@@ -23,6 +23,7 @@
 // This notice may not be removed or altered from any source distribution.
 
 #include "TclTypeHelpers.hh"
+#include <tcl.h>
 
 #include "Liberty.hh"
 #include "Network.hh"
@@ -40,7 +41,7 @@ tclListSetConstChar(Tcl_Obj *const source,
   if (Tcl_ListObjGetElements(interp, source, &argc, &argv) == TCL_OK) {
     StringSet *set = new StringSet;
     for (int i = 0; i < argc; i++) {
-      int length;
+      Tcl_Size length;
       const char *str = Tcl_GetStringFromObj(argv[i], &length);
       set->insert(str);
     }
@@ -60,7 +61,7 @@ tclListSeqConstChar(Tcl_Obj *const source,
   if (Tcl_ListObjGetElements(interp, source, &argc, &argv) == TCL_OK) {
     StringSeq *seq = new StringSeq;
     for (int i = 0; i < argc; i++) {
-      int length;
+      Tcl_Size length;
       const char *str = Tcl_GetStringFromObj(argv[i], &length);
       seq->push_back(str);
     }
@@ -80,7 +81,7 @@ tclListSetStdString(Tcl_Obj *const source,
   if (Tcl_ListObjGetElements(interp, source, &argc, &argv) == TCL_OK) {
     StdStringSet *set = new StdStringSet;
     for (int i = 0; i < argc; i++) {
-      int length;
+      Tcl_Size length;
       const char *str = Tcl_GetStringFromObj(argv[i], &length);
       set->insert(str);
     }
@@ -186,11 +187,11 @@ arcDcalcArgTcl(Tcl_Obj *obj,
 {
   Sta *sta = Sta::sta();
   sta->ensureGraph();
-  int list_argc;
+  Tcl_Size list_argc;
   Tcl_Obj **list_argv;
   if (Tcl_ListObjGetElements(interp, obj, &list_argc, &list_argv) == TCL_OK) {
     const char *input_delay = "0.0";
-    int length;
+    Tcl_Size length;
     if (list_argc == 6)
       input_delay = Tcl_GetStringFromObj(list_argv[5], &length);
     if (list_argc == 5 || list_argc == 6) {
diff --git a/tcl/Variables.tcl b/tcl/Variables.tcl
index a019c295..21e83c08 100644
--- a/tcl/Variables.tcl
+++ b/tcl/Variables.tcl
@@ -33,7 +33,7 @@ namespace eval sta {
 # Default digits to print after decimal point for reporting commands.
 set ::sta_report_default_digits 2
 
-trace variable ::sta_report_default_digits "rw" \
+trace add variable ::sta_report_default_digits {read write} \
   sta::trace_report_default_digits
 
 proc trace_report_default_digits { name1 name2 op } {
@@ -47,7 +47,7 @@ proc trace_report_default_digits { name1 name2 op } {
   }
 }
 
-trace variable ::sta_crpr_enabled "rw" \
+trace add variable ::sta_crpr_enabled {read write} \
   sta::trace_crpr_enabled
 
 proc trace_crpr_enabled { name1 name2 op } {
@@ -55,7 +55,7 @@ proc trace_crpr_enabled { name1 name2 op } {
     crpr_enabled set_crpr_enabled
 }
 
-trace variable ::sta_crpr_mode "rw" \
+trace add variable ::sta_crpr_mode {read write} \
   sta::trace_crpr_mode
 
 proc trace_crpr_mode { name1 name2 op } {
@@ -72,7 +72,7 @@ proc trace_crpr_mode { name1 name2 op } {
   }
 }
 
-trace variable ::sta_cond_default_arcs_enabled "rw" \
+trace add variable ::sta_cond_default_arcs_enabled {read write} \
   sta::trace_cond_default_arcs_enabled
 
 proc trace_cond_default_arcs_enabled { name1 name2 op } {
@@ -80,7 +80,7 @@ proc trace_cond_default_arcs_enabled { name1 name2 op } {
     cond_default_arcs_enabled set_cond_default_arcs_enabled
 }
 
-trace variable ::sta_gated_clock_checks_enabled "rw" \
+trace add variable ::sta_gated_clock_checks_enabled {read write} \
   sta::trace_gated_clk_checks_enabled
 
 proc trace_gated_clk_checks_enabled { name1 name2 op } {
@@ -88,7 +88,7 @@ proc trace_gated_clk_checks_enabled { name1 name2 op } {
     gated_clk_checks_enabled set_gated_clk_checks_enabled
 }
 
-trace variable ::sta_internal_bidirect_instance_paths_enabled "rw" \
+trace add variable ::sta_internal_bidirect_instance_paths_enabled {read write} \
   sta::trace_internal_bidirect_instance_paths_enabled
 
 proc trace_internal_bidirect_instance_paths_enabled { name1 name2 op } {
@@ -96,7 +96,7 @@ proc trace_internal_bidirect_instance_paths_enabled { name1 name2 op } {
     bidirect_inst_paths_enabled set_bidirect_inst_paths_enabled
 }
 
-trace variable ::sta_bidirect_net_paths_enabled "rw" \
+trace add variable ::sta_bidirect_net_paths_enabled {read write} \
   sta::trace_bidirect_net_paths_enabled
 
 proc trace_bidirect_net_paths_enabled { name1 name2 op } {
@@ -104,7 +104,7 @@ proc trace_bidirect_net_paths_enabled { name1 name2 op } {
     bidirect_net_paths_enabled set_bidirect_net_paths_enabled
 }
 
-trace variable ::sta_clock_through_tristate_enabled "rw" \
+trace add variable ::sta_clock_through_tristate_enabled {read write} \
   sta::trace_clock_through_tristate_enabled
 
 proc trace_clock_through_tristate_enabled { name1 name2 op } {
@@ -112,7 +112,7 @@ proc trace_clock_through_tristate_enabled { name1 name2 op } {
     clk_thru_tristate_enabled set_clk_thru_tristate_enabled
 }
 
-trace variable ::sta_preset_clear_arcs_enabled "rw" \
+trace add variable ::sta_preset_clear_arcs_enabled {read write} \
   sta::trace_preset_clr_arcs_enabled
 
 proc trace_preset_clr_arcs_enabled { name1 name2 op } {
@@ -120,7 +120,7 @@ proc trace_preset_clr_arcs_enabled { name1 name2 op } {
     preset_clr_arcs_enabled set_preset_clr_arcs_enabled
 }
 
-trace variable ::sta_recovery_removal_checks_enabled "rw" \
+trace add variable ::sta_recovery_removal_checks_enabled {read write} \
   sta::trace_recovery_removal_checks_enabled
 
 proc trace_recovery_removal_checks_enabled { name1 name2 op } {
@@ -128,7 +128,7 @@ proc trace_recovery_removal_checks_enabled { name1 name2 op } {
     recovery_removal_checks_enabled set_recovery_removal_checks_enabled
 }
 
-trace variable ::sta_dynamic_loop_breaking "rw" \
+trace add variable ::sta_dynamic_loop_breaking {read write} \
   sta::trace_dynamic_loop_breaking
 
 proc trace_dynamic_loop_breaking { name1 name2 op } {
@@ -136,7 +136,7 @@ proc trace_dynamic_loop_breaking { name1 name2 op } {
     dynamic_loop_breaking set_dynamic_loop_breaking
 }
 
-trace variable ::sta_input_port_default_clock "rw" \
+trace add variable ::sta_input_port_default_clock {read write} \
   sta::trace_input_port_default_clock
 
 proc trace_input_port_default_clock { name1 name2 op } {
@@ -144,7 +144,7 @@ proc trace_input_port_default_clock { name1 name2 op } {
     use_default_arrival_clock set_use_default_arrival_clock
 }
 
-trace variable ::sta_propagate_all_clocks "rw" \
+trace add variable ::sta_propagate_all_clocks {read write} \
   sta::trace_propagate_all_clocks
 
 proc trace_propagate_all_clocks { name1 name2 op } {
@@ -152,7 +152,7 @@ proc trace_propagate_all_clocks { name1 name2 op } {
     propagate_all_clocks set_propagate_all_clocks
 }
 
-trace variable ::sta_propagate_gated_clock_enable "rw" \
+trace add variable ::sta_propagate_gated_clock_enable {read write} \
   sta::trace_propagate_gated_clock_enable
 
 proc trace_propagate_gated_clock_enable { name1 name2 op } {
@@ -160,7 +160,7 @@ proc trace_propagate_gated_clock_enable { name1 name2 op } {
     propagate_gated_clock_enable set_propagate_gated_clock_enable
 }
 
-trace variable ::sta_pocv_enabled "rw" \
+trace add variable ::sta_pocv_enabled {read write} \
   sta::trace_pocv_enabled
 
 proc trace_pocv_enabled { name1 name2 op } {