diff -rup glibc-2.38/sysdeps/powerpc/atomic-machine.h glibc-2.38.new/sysdeps/powerpc/atomic-machine.h
--- glibc-2.38/sysdeps/powerpc/atomic-machine.h	2023-08-01 03:54:16.000000000 +1000
+++ glibc-2.38.new/sysdeps/powerpc/atomic-machine.h	2023-12-28 19:53:04.478314053 +1100
@@ -47,6 +47,10 @@
 # define MUTEX_HINT_REL
 #endif
 
+#ifndef DCBST
+# define DCBST(x)
+#endif
+
 #define atomic_full_barrier()	__asm ("sync" ::: "memory")
 
 #define __arch_compare_and_exchange_val_32_acq(mem, newval, oldval)	      \
@@ -57,6 +61,7 @@
 		        "1:	lwarx	%0,0,%1" MUTEX_HINT_ACQ "\n"	      \
 		        "	cmpw	%0,%2\n"			      \
 		        "	bne	2f\n"				      \
+		        DCBST("%1")					      \
 		        "	stwcx.	%3,0,%1\n"			      \
 		        "	bne-	1b\n"				      \
 		        "2:	" __ARCH_ACQ_INSTR			      \
@@ -74,6 +79,7 @@
 		        "1:	lwarx	%0,0,%1" MUTEX_HINT_REL "\n"	      \
 		        "	cmpw	%0,%2\n"			      \
 		        "	bne	2f\n"				      \
+		        DCBST("%1")					      \
 		        "	stwcx.	%3,0,%1\n"			      \
 		        "	bne-	1b\n"				      \
 		        "2:	"					      \
@@ -88,6 +94,7 @@
     __typeof (*mem) __val;						      \
     __asm __volatile (							      \
 		      "1:	lwarx	%0,0,%2" MUTEX_HINT_ACQ "\n"	      \
+		      DCBST("%2")					      \
 		      "		stwcx.	%3,0,%2\n"			      \
 		      "		bne-	1b\n"				      \
 		      "   " __ARCH_ACQ_INSTR				      \
@@ -102,6 +109,7 @@
     __typeof (*mem) __val;						      \
     __asm __volatile (__ARCH_REL_INSTR "\n"				      \
 		      "1:	lwarx	%0,0,%2" MUTEX_HINT_REL "\n"	      \
+		      DCBST("%2")					      \
 		      "		stwcx.	%3,0,%2\n"			      \
 		      "		bne-	1b"				      \
 		      : "=&r" (__val), "=m" (*mem)			      \
@@ -115,6 +123,7 @@
     __typeof (*mem) __val, __tmp;					      \
     __asm __volatile ("1:	lwarx	%0,0,%3\n"			      \
 		      "		add	%1,%0,%4\n"			      \
+		      DCBST("%3")					      \
 		      "		stwcx.	%1,0,%3\n"			      \
 		      "		bne-	1b"				      \
 		      : "=&b" (__val), "=&r" (__tmp), "=m" (*mem)	      \
@@ -128,6 +137,7 @@
     __typeof (*mem) __val, __tmp;					      \
     __asm __volatile ("1:	lwarx	%0,0,%3" MUTEX_HINT_ACQ "\n"	      \
 		      "		add	%1,%0,%4\n"			      \
+		      DCBST("%3")					      \
 		      "		stwcx.	%1,0,%3\n"			      \
 		      "		bne-	1b\n"				      \
 		      __ARCH_ACQ_INSTR					      \
@@ -143,6 +153,7 @@
     __asm __volatile (__ARCH_REL_INSTR "\n"				      \
 		      "1:	lwarx	%0,0,%3" MUTEX_HINT_REL "\n"	      \
 		      "		add	%1,%0,%4\n"			      \
+		      DCBST("%3")					      \
 		      "		stwcx.	%1,0,%3\n"			      \
 		      "		bne-	1b"				      \
 		      : "=&b" (__val), "=&r" (__tmp), "=m" (*mem)	      \
@@ -156,6 +167,7 @@
     __typeof (*(mem)) __val;						      \
     __asm __volatile ("1:	lwarx	%0,0,%2\n"			      \
 		      "		addi	%0,%0,1\n"			      \
+		      DCBST("%2")					      \
 		      "		stwcx.	%0,0,%2\n"			      \
 		      "		bne-	1b"				      \
 		      : "=&b" (__val), "=m" (*mem)			      \
@@ -169,6 +181,7 @@
     __typeof (*(mem)) __val;						      \
     __asm __volatile ("1:	lwarx	%0,0,%2\n"			      \
 		      "		subi	%0,%0,1\n"			      \
+		      DCBST("%2")					      \
 		      "		stwcx.	%0,0,%2\n"			      \
 		      "		bne-	1b"				      \
 		      : "=&b" (__val), "=m" (*mem)			      \
@@ -183,6 +196,7 @@
 		       "	cmpwi	0,%0,0\n"			      \
 		       "	addi	%1,%0,-1\n"			      \
 		       "	ble	2f\n"				      \
+		       DCBST("%3")					      \
 		       "	stwcx.	%1,0,%3\n"			      \
 		       "	bne-	1b\n"				      \
 		       "2:	" __ARCH_ACQ_INSTR			      \
diff -rup glibc-2.38/sysdeps/powerpc/nptl/pthread_spin_lock.c glibc-2.38.new/sysdeps/powerpc/nptl/pthread_spin_lock.c
--- glibc-2.38/sysdeps/powerpc/nptl/pthread_spin_lock.c	2023-08-01 03:54:16.000000000 +1000
+++ glibc-2.38.new/sysdeps/powerpc/nptl/pthread_spin_lock.c	2023-12-28 19:55:47.224758706 +1100
@@ -27,6 +27,9 @@ __pthread_spin_lock (pthread_spinlock_t
        "1:	lwarx	%0,0,%1" MUTEX_HINT_ACQ "\n"
        "	cmpwi	0,%0,0\n"
        "	bne-	2f\n"
+#ifdef __ESPRESSO__
+       "	dcbst	0,%1\n"
+#endif
        "	stwcx.	%2,0,%1\n"
        "	bne-	2f\n"
                 __ARCH_ACQ_INSTR "\n"
diff -rup glibc-2.38/sysdeps/powerpc/nptl/pthread_spin_trylock.c glibc-2.38.new/sysdeps/powerpc/nptl/pthread_spin_trylock.c
--- glibc-2.38/sysdeps/powerpc/nptl/pthread_spin_trylock.c	2023-08-01 03:54:16.000000000 +1000
+++ glibc-2.38.new/sysdeps/powerpc/nptl/pthread_spin_trylock.c	2023-12-28 19:55:28.433110714 +1100
@@ -28,6 +28,9 @@ __pthread_spin_trylock (pthread_spinlock
   asm ("1:	lwarx	%0,0,%2" MUTEX_HINT_ACQ "\n"
        "	cmpwi	0,%0,0\n"
        "	bne	2f\n"
+#ifdef __ESPRESSO__
+       "	dcbst	0,%2\n"
+#endif
        "	stwcx.	%3,0,%2\n"
        "	bne-	1b\n"
        "	li	%1,0\n"
diff -rup glibc-2.38/sysdeps/powerpc/powerpc32/atomic-machine.h glibc-2.38.new/sysdeps/powerpc/powerpc32/atomic-machine.h
--- glibc-2.38/sysdeps/powerpc/powerpc32/atomic-machine.h	2023-08-01 03:54:16.000000000 +1000
+++ glibc-2.38.new/sysdeps/powerpc/powerpc32/atomic-machine.h	2023-12-28 19:54:34.871034639 +1100
@@ -36,6 +36,14 @@
 #define USE_ATOMIC_COMPILER_BUILTINS 0
 #define ATOMIC_EXCHANGE_USES_CAS 1
 
+// Espresso processors found in the Nintendo Wii U require a dcbst before
+// stwcx due to an errata.
+#ifdef __ESPRESSO__
+# define DCBST(x) "dcbst 0," x "\n"
+#else
+# define DCBST(x)
+#endif
+
 /*
  * The 32-bit exchange_bool is different on powerpc64 because the subf
  * does signed 64-bit arithmetic while the lwarx is 32-bit unsigned
@@ -49,6 +57,7 @@
 		    "1:	lwarx	%0,0,%1" MUTEX_HINT_ACQ "\n"		      \
 		    "	subf.	%0,%2,%0\n"				      \
 		    "	bne	2f\n"					      \
+		    DCBST("%1")						      \
 		    "	stwcx.	%3,0,%1\n"				      \
 		    "	bne-	1b\n"					      \
 		    "2:	" __ARCH_ACQ_INSTR				      \