# --- T2-COPYRIGHT-BEGIN ---
# t2/architecture/ia64/package/*/tcg-ia64-fixes.patch.ia64
# Copyright (C) 2026 The T2 SDE Project
# SPDX-License-Identifier: GPL-2.0 or patched project license
# --- T2-COPYRIGHT-END ---

--- qemu-2.10.2/tcg/ia64/tcg-target.inc.c.vanilla	2026-05-17 20:27:17.191035097 +0200
+++ qemu-2.10.2/tcg/ia64/tcg-target.inc.c	2026-05-17 20:29:18.868792204 +0200
@@ -1485,7 +1485,7 @@
 #if defined(CONFIG_SOFTMMU)
 /* We're expecting to use an signed 22-bit immediate add.  */
 QEMU_BUILD_BUG_ON(offsetof(CPUArchState, tlb_table[NB_MMU_MODES - 1][1])
-                  > 0x1fffff)
+                  > 0x1fffff);
 
 /* Load and compare a TLB entry, and return the result in (p6, p7).
    R2 is loaded with the addend TLB entry.
@@ -2388,6 +2388,7 @@
                    tcg_opc_i21(TCG_REG_P0, OPC_MOV_I21,
                                TCG_REG_B6, TCG_REG_R33, 0));
 
+#ifndef CONFIG_SOFTMMU    
     /* ??? If guest_base < 0x200000, we could load the register via
        an ADDL in the M slot of the next bundle.  */
     if (guest_base != 0) {
@@ -2398,6 +2399,7 @@
                                    TCG_GUEST_BASE_REG, guest_base));
         tcg_regset_set_reg(s->reserved_regs, TCG_GUEST_BASE_REG);
     }
+#endif
 
     tcg_out_bundle(s, miB,
                    tcg_opc_a4 (TCG_REG_P0, OPC_ADDS_A4,